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Electronic design automation
Results: 1598

#	Item
711	SNPS[removed]10-K Add to Reading List Source URL: synopsys.com Language: English - Date: 2014-12-15 13:24:22 Integrated circuits Hardware verification languages Synopsys Hardware description language Electronic system-level design and verification Signoff Logic synthesis Integrated circuit design SystemVerilog Electronic engineering Electronic design automation Electronic design
712	Microsoft Word - haig14.doc Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2008-05-20 20:12:25 Digital electronics Electronic design And-inverter graph Retiming Logic optimization Automatic test pattern generation Combinational logic Formal verification Logic programming Electronic engineering Formal methods Electronic design automation
713	Speculative Reduction-Based Scalable Redundancy Identification Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2009-05-13 19:49:55 Applied mathematics Theoretical computer science Logic Electronic design automation Mathematical induction Proof theory Mathematical proof Formal verification And-inverter graph Mathematics Mathematical logic Formal methods
714	Board-Level Multiterminal Net Assignment Xiaoyu Song1, William N. N. Hung2, Alan Mishchenko1, Malgorzata Chrzanowska-Jeske1, Alan Coppola3 and Andrew Kennings4 1 Department of ECE, Portland State University, Portland, O Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2002-03-01 13:11:46 Applied mathematics Logic in computer science NP-complete problems Formal methods Boolean algebra Boolean satisfiability problem Field-programmable gate array Conjunctive normal form Routing Theoretical computer science Electronic engineering Electronic design automation
715	Improvements to Technology Mapping for LUT-Based FPGAs Alan Mishchenko Satrajit Chatterjee Robert Brayton Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-02-27 22:53:37 Diagrams And-inverter graph Logic synthesis Field-programmable gate array Directed acyclic graph Algorithm Heuristic function Electronic engineering Electronic design automation Electrical engineering
716	DAG-Aware AIG Rewriting A Fresh Look at Combinational Logic Synthesis Alan Mishchenko Satrajit Chatterjee Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-05-08 11:02:22 Digital electronics Electronic design Logic in computer science And-inverter graph Logic synthesis Field-programmable gate array American International Group Directed acyclic graph Logic gate Electronic engineering Electronic design automation Formal methods
717	Microsoft Word - fpga061s-mishchenko1.doc Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2009-12-16 19:04:56 Digital electronics Electronic design And-inverter graph Field-programmable gate array Logic synthesis Static timing analysis Placement Logic optimization Propagation delay Electronic engineering Electronic design automation Formal methods
718	Fast Minimum-Register Retiming via Binary Maximum-Flow Alan Mishchenko Aaron Hurst Robert Brayton Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-11-20 10:30:53 Formal methods Electronics Retiming Electronic design automation Maximum flow problem Flow network Digital electronics Ford–Fulkerson algorithm Logic gate Network flow Electronic engineering Mathematics
719	SAT-Based Complete Don’t-Care Computation for Network Optimization Alan Mishchenko and Robert K. Brayton Department of EECS University of California, Berkeley {alanmi, brayton}@eecs.berkeley.edu Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2004-12-03 17:46:16 Boolean algebra Electronic design automation Formal methods Bioinformatics Boolean network Logic Boolean satisfiability problem Circuit Model checking Theoretical computer science Applied mathematics Mathematics
720	Logic Synthesis for Regular Layout using Satisfiability Marek Perkowski and Alan Mishchenko Department of Electrical and Computer Engineering Portland State University Portland, OR 97207, USA [mperkows, alanmi]@ece.pdx.e Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2002-05-01 01:40:28 Theoretical computer science Electronic design automation Diagrams Formal methods Lattice theory Binary decision diagram Boolean satisfiability problem Logic synthesis Lattice Abstract algebra Mathematics Boolean algebra

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